Overview
Software is written using a limited number of 'architectural' registers (e.g., EAX, EBX in x86). This often causes 'Write-After-Read' (WAR) or 'Write-After-Write' (WAW) dependencies that aren't real data dependencies but just a lack of available registers.
How it Works
The CPU maintains a large pool of physical registers. When an instruction writes to an architectural register, the CPU assigns it a fresh physical register. This allows multiple instructions to 'write to EAX' simultaneously without interfering with each other.
Importance
Register renaming is a critical enabler for Out-of-Order Execution, as it allows the CPU to find much more parallelism in the instruction stream.