India Unveils DHRUV64: A Milestone in Indigenous RISC‑V Processor Development

The Indian government has announced the launch of DHRUV64, a 1.0 GHz, 64‑bit dual‑core microprocessor developed by the Centre for Development of Advanced Computing (C‑DAC). Designed under the Microprocessor Development Programme (MDP) and the Digital India RISC‑V (DIR‑V) initiative, DHRUV64 is the first fully indigenous processor that leverages the open‑source RISC‑V instruction set.

Technical Highlights

  • Architecture: 64‑bit, dual‑core, RISC‑V compliant with custom extensions for low‑power and high‑throughput workloads.
  • Performance: Clock speed of 1 GHz, targeting 1.5 GFLOPS in integer operations.
  • Fabrication: 28 nm CMOS process supplied by a domestic fab, demonstrating India’s growing capability in high‑performance chip manufacturing.
  • Ecosystem Support: Comes with a full suite of software toolchains, OS ports, and a development board for rapid prototyping.

Strategic Significance

India consumes roughly 20 % of the world’s microprocessors. By creating a homegrown alternative, DHRUV64 reduces reliance on foreign suppliers, a critical factor for national security and economic resilience. The processor’s open‑source foundation eliminates licensing costs, enabling widespread adoption across startups, academia, and large enterprises.

The Role of DIR‑V

The DIR‑V programme, launched in 2022, aims to position India as a global hub for Electronics System Design and Manufacturing (ESDM). DHRUV64 is the third chip under this umbrella, following earlier projects like SHAKTI and VIKRAM. The initiative fosters collaboration between research institutions, industry, and the government, creating a shared design ecosystem that accelerates innovation.

Institutional Ecosystem

Agency Contribution
Ministry of Electronics and Information Technology (MeitY) Policy guidance, funding, and long‑term planning through schemes such as the India Semiconductor Mission (ISM).
C‑DAC Design of processor IPs, SoCs, and development boards; leads the next‑generation RISC‑V processors Dhanush and Dhanush+.
ISM Secured ₹1.60 lakh crore across ten projects, attracting global semiconductor investment.
C2S Programme Trains 85,000 industry‑ready engineers across 113 institutions, building a fabless chip design ecosystem.
DLI Scheme Provides financial incentives and infrastructure support throughout the IC design lifecycle.

Impact on R&D and Innovation

DHRUV64 equips India’s talent pool with a modern, open‑source platform for research and product development. Early adopters include automotive OEMs exploring autonomous driving stacks, telecom operators building 5G baseband processors, and IoT manufacturers seeking low‑power edge solutions. The processor’s modular design allows future upgrades—such as integrating custom vector units—without redesigning the entire core.

Looking Ahead

The success of DHRUV64 sets the stage for Dhanush and Dhanush+, projected to push performance into the 2 GHz range and introduce advanced security features. Combined with the ISM’s investment pipeline, India is poised to become a significant player in the global semiconductor supply chain.

“DHRUV64 is not just a chip; it is a statement of India’s technological confidence and a catalyst for the next wave of indigenous innovation.” – C‑DAC Director

Conclusion

India’s launch of DHRUV64 marks a pivotal moment in the nation’s pursuit of digital sovereignty. By harnessing open‑source RISC‑V architecture and a robust institutional framework, the country is building a sustainable ecosystem that can nurture talent, spur innovation, and secure critical infrastructure.

Source: Press Information Bureau – “DHRUV64: India’s First 1.0 GHz, 64‑bit Dual‑Core Microprocessor”