A technical exploration demonstrates how NIST-standardized Ascon cryptography can run on an HP-16C calculator from the 1980s, revealing insights about algorithmic efficiency and hardware constraints across computing eras.
The implementation of Ascon—a NIST-standardized lightweight cryptographic algorithm—on a vintage HP-16C calculator represents more than a technical curiosity; it illuminates fundamental principles about computational efficiency and cryptographic adaptability across hardware generations. Developed in 2014 and finalized as NIST SP 800-232 in 2025, Ascon targets resource-constrained devices. Its successful deployment on a 1980s calculator with just 200 bytes of memory challenges assumptions about the minimum requirements for modern cryptographic operations.
Bridging Computational Eras
At its core, Ascon employs the Ascon-p permutation, a sponge construction that performs rounds of substitutions and permutations. The HP-16C, released in 1982, features a 4-bit CPU and severely limited memory. Implementing Ascon-p[12] (12 permutation rounds) required translating operations into the calculator's RPN (Reverse Polish Notation) instruction set. Each cryptographic operation involves:
- Bitwise XORs and logical operations
- Rotations with variable offsets
- State management across five 64-bit registers (R0-R4)
The program listing comprises 140 instructions, consuming nearly all available program space. This implementation prioritizes clarity over optimization, directly mirroring Ascon's reference C code structure.
Operational Mechanics
Consider hashing an empty string (Ascon-Hash256):
- Pad the message with
0x01followed by zeros - Initialize register R0 with
0x80100cc0002 - Apply Ascon-p[12] via
C GSB 0 - XOR message block with R0
- Reapply permutation
- Extract hash bytes from R0 in little-endian format
Each round involves:
- Nonlinear substitutions using AND/NOT operations
- Diffusion layers with bit rotations (e.g.,
s0 = s0 ^ (s0 ror 19) ^ (s0 ror 28)) - Round constant integration
Performance Tradeoffs
Execution times reveal hardware limitations:
- Single round: ~20 seconds
- Ascon-p[8]: ~2.5 minutes
- Ascon-p[12]: ~4 minutes
This latency stems from the HP-16C's serial processing and lack of parallel operations. Modern microcontrollers perform these operations in milliseconds, highlighting three decades of hardware evolution. Yet the calculator's capacity to execute the algorithm at all demonstrates Ascon's exceptional lightweight design.
Cryptographic Significance
This experiment validates several critical insights:
- Cryptographic security doesn't inherently require modern hardware when algorithms are purpose-built for constraints
- Ascon's structure—particularly its bitwise operations—translates well across instruction sets
- The 64-bit word size of the HP-16C aligns surprisingly well with Ascon's 64-bit state words
Critically, this remains a proof-of-concept. Real-world deployment would face challenges including side-channel vulnerabilities and impractical throughput. However, the exercise underscores how thoughtfully designed cryptographic primitives can transcend their original hardware context.
For those replicating the experiment, the JRPN 16C emulator provides a virtual environment. While impractical for production use, this marriage of 1980s hardware and post-quantum cryptography serves as a compelling case study in computational continuity.

Comments
Please log in or register to join the discussion