SMIC: AI Surge Fuels Power‑Management Chip Orders, Automotive Analog BCD Platform Hits Full Capacity

What SMIC claims

During its May 15 earnings call, SMIC co‑CEO Zhao Haijun said the current AI boom is driving a surge in orders for power‑management (PMIC) and data‑transmission chips. At the same time, the same market pressure is constricting the supply chain for NOR‑Flash and other memory products. Zhao highlighted that SMIC’s stand‑alone Flash process and analog process lines are seeing “robust demand,” and that the automotive‑grade analog BCD platform is fully booked, as vehicle semiconductor content rises with the shift to electric and intelligent cars.

What’s actually new

Area	SMIC’s announced capability	Why it matters now
Power‑management ICs	28 nm and 40 nm PMIC processes optimized for high‑current, low‑noise operation.	AI accelerators (e.g., GPUs, ASICs, LLM inference chips) consume tens to hundreds of watts; efficient on‑chip voltage regulation reduces system‑level power loss and thermal load.
Data‑transmission silicon	45 nm high‑speed SerDes and DDR‑compatible I/O stacks.	Large AI models require fast DRAM refresh and inter‑processor links; faster SerDes helps keep latency low in distributed inference clusters.
Standalone Flash	28 nm NOR‑Flash process with 2 Gb per wafer capacity.	Edge AI devices (smart cameras, autonomous‑driving sensors) still rely on non‑volatile code storage; supply constraints have pushed foundries to prioritize capacity.
Automotive analog BCD	Integrated bipolar‑CMOS‑DMOS (BCD) flow supporting 150 °C operation, on‑chip voltage regulation, and power‑stage drivers.	Modern EVs and ADAS units need rugged analog front‑ends for motor control, battery‑management, and sensor interfacing. The “full order book” claim suggests SMIC is now a volume supplier for several OEMs.

The press release does not disclose specific customers or order volumes, but the combination of AI‑driven data‑center growth and EV/ADAS expansion creates a logical overlap: AI workloads increase system‑level power budgets, while EVs demand reliable high‑voltage analog control. SMIC’s ability to produce both on a single 28 nm node reduces the need for multiple fabs, an advantage for Chinese OEMs seeking localized supply.

Limitations and caveats

• Process node maturity: SMIC’s most advanced logic node is 7 nm (risk‑reduced), but the PMIC and BCD platforms remain at 28–45 nm. Competing foundries (TSMC, GlobalFoundries) already offer 22 nm and 14 nm analog/BCD options with higher integration density. SMIC’s older nodes may limit scaling for future AI accelerators that push beyond 200 W.
• Memory bottleneck: While SMIC can ship more NOR‑Flash, the broader market shortage is driven by NAND demand for large‑scale AI training. NOR‑Flash remains a niche, so the “constraining memory supply chain” comment likely reflects a localized shortage rather than a systemic issue.
• Design ecosystem: Automotive BCD designs require extensive qualification (ISO‑26262, AEC‑Q100). SMIC’s recent qualification wins are not public, and OEMs typically rely on proven IP libraries. Without clear IP support, customers may still prefer established suppliers.
• Geopolitical risk: SMIC operates under export controls that limit access to certain EUV equipment. This could affect long‑term scaling of its analog and flash processes, especially as competitors adopt more advanced lithography.

Bottom line

SMIC’s earnings call highlights a genuine market trend: AI‑driven compute is raising power‑management and high‑speed I/O demand, while the electrification of vehicles is expanding the need for rugged analog BCD solutions. The company’s existing 28‑nm and 45‑nm process families can meet current volume needs, but they sit behind the most advanced nodes offered by global rivals. Continued growth will depend on SMIC’s ability to scale capacity, broaden its design ecosystem, and navigate export restrictions.

Further reading

• SMIC’s official earnings release (PDF)
• Overview of automotive BCD technology from Analog Devices: BCD for automotive
• Analysis of AI‑driven power‑management trends: IEEE Transactions on Power Electronics, 2025 edition.