Mesa 26.1 Adds Experimental Intel Nova Lake P Graphics Support

Mesa 26.1 has merged the first experimental device bits for Intel's upcoming Nova Lake P graphics architecture, marking another step in the open-source driver stack's preparation for Intel's next-generation hardware. The changes, submitted by Intel's Mesa developers, add nine different PCI device IDs for the NVL-P target across both the ANV Vulkan driver and Iris Gallium3D driver.

Unlike the other Nova Lake variants that currently have just one or two device IDs exposed, Nova Lake P brings significantly more identifiers to the table. This expanded device ID set suggests Intel is planning a more diverse product lineup for the P-series parts, though not all IDs may correspond to actual shipping products. Some are likely reserved for engineering validation, potential future additions, or other purposes that won't necessarily reach end users.

The Nova Lake P support arrives alongside recent Xe kernel graphics driver changes, maintaining consistency across the open-source graphics stack. However, like all current Nova Lake targets including Nova Lake S, U, H, HX, and UL, the P-series support remains experimental and requires the FORCE_PROBE option to be enabled. This means the drivers won't automatically detect and use these devices until the Xe3P support matures further.

Intel's Mesa developers have been actively working on the Xe3P target as part of their broader effort to prepare the open-source graphics stack for Nova Lake's launch. The initial device bits merged this week are available in the Mesa 26.1-devel branch through the relevant merge request, though end users won't see immediate benefits since the support isn't yet exposed by default.

Looking ahead, the Nova Lake graphics support is expected to continue evolving through the Mesa 26.1 and 26.2 development cycles. This incremental approach allows Intel and the Mesa community to refine the drivers ahead of Nova Lake's anticipated product launch, which is currently targeted for late 2026. The experimental nature of this support reflects the typical development pattern for new graphics architectures, where initial device detection and basic functionality precede full feature enablement and performance optimization.