ASML and Tata Electronics have signed an MOU to install EUV‑free lithography tools at the Dholera 300 mm fab. Backed by $11 billion, the plant will run 28‑110 nm nodes, aim for 50 000 wafers per month, and anchor a new front‑end supply chain in India.
ASML to Equip India’s First Commercial Chip Fab – $11 B Dholera Project Targets 50 k Wafers/Month
Image credit: ASML
Announcement
During Indian Prime Minister Narendra Modi’s visit to the Netherlands, ASML and Tata Electronics signed a memorandum of understanding that commits ASML’s lithography portfolio to India’s first front‑end semiconductor fab in Dholera, Gujarat. The agreement covers the delivery of lithography tools, a talent‑development programme and supply‑chain support for a facility funded with $11 billion of total investment.
Technical specifications
| Parameter | Detail |
|---|---|
| Fab size | 300 mm wafer line, 300 mm cleanroom footprint ~ 350,000 m² |
| Target throughput | 50,000 wafers / month (≈ 600 k wafers / year) |
| Process nodes | 28 nm, 40 nm, 55 nm, 90 nm, 110 nm (licensed from Powerchip Semiconductor Manufacturing Corp.) |
| Lithography equipment | ASML’s NXE:34000i and TWINSCAN NXT:2000i i-line tools (non‑EUV, high‑NA immersion) |
| Yield expectations | 70‑80 % for mature nodes (based on Powerchip’s historical data) |
| Design focus | Power‑management ICs, display drivers, micro‑controllers, automotive‑grade HPC logic |
| Talent pipeline | Joint training centre with ASML engineers, 200‑person apprenticeship cohort by 2025 |
| Supply‑chain partners | PSMC (process licensing, design assistance), Applied Materials (etch), Lam Research (deposition) |
The Dholera fab will use immersion ArF lithography for the 28‑55 nm layers and i‑line steppers for the 90‑110 nm layers. While EUV is not required for these nodes, the NXE:34000i’s high‑NA optics provide tighter depth‑of‑focus control, which translates into a 10‑15 % reduction in critical‑dimension variation compared with legacy KrF tools. This improvement is critical for power‑management ICs where voltage‑drop margins are tight.
Market implications
- Domestic front‑end capacity – India currently has no wafer‑fab production beyond assembly and test. The Dholera plant will be the sole commercial foundry, closing the most expensive step of the semiconductor value chain for Indian designers.
- Supply‑chain resilience – By locating lithography, etch and deposition equipment in Gujarat, the fab reduces reliance on East‑Asian fabs for mature‑node chips used in automotive and IoT devices. The India Semiconductor Mission is covering 50 % of eligible costs, while Gujarat’s SEZ incentives lower capital‑expenditure by an estimated 15‑20 %.
- Competitive pricing – With a target throughput of 50 k wafers/month and mature‑node yields of 75 %, the fab can produce **37 k good wafers** per month. At an average selling price of $120 per wafer for power‑ICs, monthly revenue potential exceeds $4.5 million, enough to amortize the $11 billion capex over a 12‑year horizon assuming 70 % plant utilisation.
- Talent development – The ASML‑Tata training programme aims to certify 200 engineers per year in lithography process control and fab automation. This creates a local talent pool that can support downstream packaging and design houses, aligning with the Pax Silica initiative announced earlier this year.
- Strategic positioning – For global fab customers, the Dholera site offers a low‑cost, high‑volume alternative for mature‑node production, especially for automotive‑grade parts that require TSMC‑compatible reliability but at a lower price point.
Construction is already ~50 % complete; a redesign to address soft, saline soil was completed without shifting the overall schedule. Trial production is still slated for later this year, with full‑scale ramp‑up expected in 2027.
Outlook
If the Dholera fab reaches its design capacity, India could supply ~600 k wafers annually for domestic automotive, mobile and AI edge markets. Combined with existing assembly‑test capacity in Sanand, the country moves from a pure consumer of chips to a modest exporter of mature‑node silicon. The partnership with ASML not only brings world‑class lithography hardware but also embeds a technology transfer framework that could accelerate future EUV adoption should India decide to expand into sub‑20 nm nodes.
For more details on ASML’s lithography portfolio, see the official product page.

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