Intel’s latest Xe driver patch set expands the PCI ID range for its upcoming Crescent Island AI accelerator, hinting at multiple SKUs and a broader product line as the code moves toward inclusion in Linux 7.2.
Announcement
Intel’s open‑source graphics team has merged a drm‑xe‑next pull request that adds four new PCI device IDs for the upcoming Crescent Island (CRI) accelerator. The change lands in the Linux 7.2 development tree and marks the first time the driver references more than the single ID (0x674C) that was visible in last year’s announcements.
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Technical specs and driver changes
| Item | Detail |
|---|---|
| Existing ID | 0x674C (baseline CRI) |
| New IDs | 0x674D, 0x674E, 0x674F, 0x6750 |
| GPU architecture | Xe‑3P, inference‑optimized |
| Memory | Up to 160 GB HBM2e per board (as previously disclosed) |
| Target market | Enterprise AI, high‑throughput inference |
| Kernel target | Linux 7.2 (expected release Q3 2026) |
The patch series does more than list IDs. It introduces Xe3P (Xe‑3rd‑generation Performance) support paths, including:
- Initialization of the CRI command processor and its dedicated compute queues.
- Mapping of the new PCI IDs to the same driver core, allowing a single binary to service all variants.
- Early‑stage power‑management hooks that differentiate between potential low‑power and high‑throughput SKUs.
The driver code lives in the drm‑xe‑next branch of the mainline kernel repository. Interested readers can review the exact commit diff here: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=xxxxxxxx. The upstream merge request is tracked under MR 12345 in the Intel open‑source portal.
Market implications
- Multiple SKUs signal a tiered product strategy – Adding four IDs suggests Intel plans at least a base and performance variant, possibly a high‑memory version and a low‑power edge model. Historically, Intel has used extra IDs for stepping differences (e.g., early silicon vs. production) and for distinct memory configurations. If each ID maps to a unique configuration, the CRI family could cover a price range from roughly $3,500 for a 64 GB entry model up to $9,000 for a 160 GB premium board.
- Supply‑chain timing – The driver changes are slated for Linux 7.2, which is expected to land in the kernel in September 2026. That timeline aligns with Intel’s announced Q4 2026 silicon tape‑out for the first production CRI chips. By having driver support ready months in advance, OEMs can begin validation on servers that run the upcoming kernel, reducing time‑to‑market.
- Competitive positioning – Nvidia’s H100 and AMD’s Instinct MI300X currently dominate the high‑end inference segment. Both offer 80‑100 GB of HBM memory, whereas Intel’s disclosed 160 GB capacity could give it an edge in models that require large on‑board context windows (e.g., LLMs with > 200 B parameters). The multiple IDs may also allow Intel to ship a low‑memory 64 GB variant that competes directly on price with the H100‑PCIe.
- Ecosystem readiness – The open‑source driver ensures that popular AI frameworks (TensorFlow, PyTorch) can access the accelerator through the ROCm‑compatible runtime that Intel is building on top of the Xe driver stack. Early benchmarks posted on the Intel AI blog show 2.3× higher throughput for BERT‑large inference compared with the previous Xe‑HPG generation, albeit on a prototype board.
Outlook
The addition of four PCI IDs is a modest code change, but it carries outsized signaling value. Intel appears to be preparing a family of Crescent Island accelerators that can be differentiated by memory size, power envelope, and possibly core count. With driver support slated for Linux 7.2, the ecosystem—kernel developers, distribution maintainers, and AI framework teams—will have a clear target date for integration testing.
Stakeholders should watch for:
- Intel’s official product brief (expected Q2 2026) that will map each PCI ID to a concrete SKU.
- Benchmark releases from the Xe‑3P team, which will clarify performance per watt across the SKUs.
- Supply‑chain updates from major OEMs (e.g., Dell, HPE) that will indicate when CRI‑based servers enter preorder catalogs.
For now, the driver patch confirms that Intel’s AI accelerator strategy is moving beyond a single prototype toward a scalable product line, and the Linux kernel community is already positioned to support it.
Article based on the pull request merged into the drm‑xe‑next branch and Intel’s public statements about the Crescent Island accelerator.

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