Fujitsu's 144-core Monaka CPU to use Broadcom's 3D chip tech

Fujitsu's 144-core Monaka CPU will be built using 3D-chip stacking tech from Broadcom, the merchant silicon slinger revealed on Thursday. Fujitsu is an old hand at CPU design. Its Arm-based A64FX catapulted the original Fugaku supercomputer to the number one spot on the Top500 in 2020. Monaka is a very different animal. Gone is the on-package HBM, replaced instead by an SRAM-heavy architecture similar in principle to AMD's Genoa-X CPUs. That platform used AMD's 3D V-Cache tech to stack 64 MB SRAM chiplets on top of the CPU's compute dies. In its top-specced config, the CPU boasted more than a gigabyte of L3 cache. Fujitsu is going for something similar with Monaka, although the chip is aimed at a broader datacenter market. The chip's four 2nm compute dies, each with 36 Armv9 cores, will ride atop an equal number of SRAM chiplets fabbed on a 5nm process node. Those stacks will be interconnected via a central I/O and memory die with 12 channels of DDR5 and PCIe 6.0 connectivity, via a silicon interposer.

Fujitsu's Monaka CPU looks a heck of a lot like an Arm take on AMD's cache-stacked X-chips. - Click to enlarge

Until recently, only AMD and Intel have had the technology required to build a SoC of this nature. With the introduction of its 3.5D XDSiP in 2024, Broadcom sought to change that. XDSiP stands for Extreme Dimension System in Package, and it's Broadcom's attempt at a standardized platform for building multi-die processors in the same vein as AMD's MI300X or Intel's Ponte Vecchio. We explored this tech in closer detail last year, but one of its standout features is its use of face-to-face hybrid bonding, which significantly benefits die-to-die bandwidth. Fujitsu is among the first chip designers to embrace the tech publicly.

Broadcom's chip customers are notoriously secretive about what IP blocks they do and don't license for their designs. For example, it's well known at this point that Google works closely with Broadcom on TPU design, but it isn't always clear where Google's contributions stop and Broadcom's begin. It's unusual that Fujitsu is disclosing its work with Broadcom.

A little over a year after revealing the tech, Broadcom says it's begun shipping the first 2nm compute SoC built using the tech. "We've been working on this for almost five years as a technology," Harish Bharadwaj, VP of Broadcom's ASIC product division, told El Reg. "We actually shipped the samples this week for Fujitsu, and, in due course, multiple of our other customers have adopted this technology for their next generation."

Having said that, it'll be a minute before we see Monaka in the wild. Fujitsu's roadmap doesn't have the chip launching until sometime in 2027. Fujitsu may be one of the first to embrace 3.5D XDSiP tech, but Bharadwaj says the Monaka is only one of roughly half a dozen designs in development. While Monaka is a CPU platform, roughly 80 percent of Broadcom's XDSiP design wins are for XPUs with HBM on board, Bharadwaj said. When it was announced in 2024, the platform supported designs with up to 12 HBM stacks. We're told designs with more than 12 stacks are now in development, suggesting we could see some truly massive chips in the not too distant future.

This partnership between Fujitsu and Broadcom represents a significant shift in the semiconductor industry's competitive landscape. By democratizing access to advanced 3D chip stacking technology, Broadcom is enabling a broader range of companies to compete in the high-performance computing market without having to develop the underlying technology in-house.

The Monaka CPU's architecture, with its 144 Armv9 cores distributed across four compute dies, each paired with SRAM chiplets, represents a novel approach to balancing compute power with memory bandwidth. This design philosophy, reminiscent of AMD's cache-stacked processors but with a distinct Arm flavor, could offer compelling performance characteristics for datacenter workloads that benefit from large, low-latency caches.

Fujitsu's decision to go public with its use of Broadcom's technology is particularly noteworthy given the typically secretive nature of chip design collaborations. This transparency could signal growing confidence in the maturity and reliability of 3D chip stacking technology, as well as a strategic move by both companies to showcase their capabilities in an increasingly competitive market.

The timeline for Monaka's release in 2027 suggests that while the technology is ready for sampling, there's still significant work to be done in terms of system integration, software optimization, and qualification for datacenter deployment. This extended development period is common for cutting-edge processor designs, especially those targeting the demanding requirements of enterprise and cloud computing environments.

As more companies adopt Broadcom's XDSiP platform, we can expect to see a proliferation of specialized processors tailored for specific workloads, from AI and machine learning to high-performance computing and networking. This trend towards heterogeneous computing, enabled by advanced packaging technologies, could lead to more efficient and powerful systems across the computing landscape.

The success of Monaka and other XDSiP-based designs could have far-reaching implications for the semiconductor industry. It may reduce the barriers to entry for companies looking to design custom processors, potentially leading to increased innovation and specialization in chip design. However, it also raises questions about the future of traditional CPU manufacturers and the extent to which they can maintain their competitive advantages in an era of increasingly commoditized advanced packaging technologies.

As the industry moves towards more complex, multi-die architectures, the importance of system-level design and integration becomes increasingly critical. Companies like Fujitsu will need to excel not just in processor design, but in creating cohesive systems that can fully leverage the capabilities of these advanced chips. This holistic approach to system design could become a key differentiator in the high-performance computing market.

The Monaka CPU project, with its ambitious specifications and innovative architecture, represents a significant milestone in the evolution of processor design. As it moves from concept to reality over the coming years, it will be closely watched by industry observers and competitors alike, potentially setting new standards for performance and efficiency in the datacenter market.