Linux 7.2 Adds ESWIN SoC to RISC-V Defconfig, Making HiFive Premier P550 Boot Out of the Box

A single Kconfig line headed into the Linux 7.2 kernel carries more weight than its diff size suggests. Anirudh Srinivasan of Tenstorrent authored a patch adding CONFIG_ARCH_ESWIN=y to the RISC-V default configuration, and the change is already queued in the architecture's for-next Git branch ahead of the 7.2 merge window. The practical result: a kernel built from the RISC-V defconfig will boot on SiFive's HiFive Premier P550 developer board without anyone first hand-editing config options.

What the change actually does

Defconfig is the baseline configuration the kernel ships for each architecture. It decides which drivers and platform support get compiled into a default build. Until now, ESWIN SoC support existed in the tree but sat off by default, meaning anyone targeting hardware built around that silicon had to enable ARCH_ESWIN themselves before compiling. Flipping it to y in defconfig moves that work upstream, so distribution maintainers and developers pulling a stock RISC-V kernel get a binary that recognizes the platform immediately.

The HiFive Premier P550 is the hardware that motivated the patch. The board pairs SiFive's P550 core complex with the ESWIN EIC7700X SoC, a chip that integrates the application processor cores alongside an NPU and the usual interconnect and I/O. The P550 cores are out-of-order designs targeting roughly the performance tier of older Arm Cortex-A75 class parts, a meaningful step up from the in-order U74 cores that defined earlier SiFive development boards like the HiFive Unmatched.

Why a one-liner matters for RISC-V

The significance here is less about the code and more about where RISC-V sits in its hardware enablement cycle. For years, running mainline Linux on RISC-V development boards meant maintaining out-of-tree patches, custom defconfigs, or vendor kernel forks. Each new SoC arrived with its own bring-up burden. Moving platform support into the default configuration is the step that turns a niche board into something a generic kernel just handles, the same trajectory Arm boards followed as the ecosystem consolidated.

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That Tenstorrent contributed the patch is worth tracking. The company builds AI accelerators and licenses RISC-V CPU IP, and its engineers have a direct interest in a RISC-V software stack that boots cleanly across reference hardware. Upstream defconfig coverage reduces friction for everyone validating software against real silicon rather than emulators like QEMU.

Market implications

The broader pattern is RISC-V slowly closing the gap between silicon availability and software readiness. Boards like the HiFive Premier P550 serve as the validation platforms that distributions, toolchain maintainers, and application developers use to certify RISC-V as a deployment target. Every friction point removed, defconfig support being a concrete one, shortens the path from chip tape-out to a developer running an unmodified upstream kernel.

For SiFive and ESWIN, default kernel support is also a signal to potential customers that the platform is a first-class citizen upstream rather than a fork-and-patch situation. As RISC-V vendors compete with established Arm offerings in the developer board and embedded markets, mainline kernel coverage is a checkbox that increasingly separates serious platforms from experimental ones.

The patch lands with the rest of the RISC-V queue when Linux 7.2 opens its merge window, with the stable release following the usual cadence of release candidates. Coverage of the change and the surrounding RISC-V kernel work is tracked at Phoronix. Anyone running a HiFive Premier P550 will be able to drop the custom config tweaks once 7.2 ships and rely on the stock RISC-V build instead.