SiFive Co-Founder Krste Asanović on Building a RISC-V IP Ecosystem and NVIDIA Partnership

The Genesis of RISC-V

Krste Asanović, co-founder of SiFive and key architect of RISC-V, traces the ISA's roots to UC Berkeley's 2010 research project aimed at creating an open, modular alternative to proprietary architectures. Unlike ARM's closed licensing model, RISC-V was intentionally designed as a royalty-free specification where anyone could implement the base instruction set. This foundational openness enabled SiFive's core business: creating specialized RISC-V IP blocks that clients license for custom silicon.

SiFive's Commercial Model

SiFive operates similarly to ARM but with crucial distinctions:

• Customizable IP Cores: Clients license not finished cores but modular building blocks (e.g., cache hierarchies, vector units) to assemble domain-specific processors
• Royalty-Free Base ISA: Avoids per-chip fees for RISC-V compliance, reducing costs
• Software Ecosystem Focus: 40% of engineers work on developer tools and compatibility layers

Asanović notes: "Our value isn't in locking down the ISA—it's in accelerating implementation. We enable designs that ARM's one-size-fits-all approach can't serve efficiently."

NVIDIA Partnership: NVLink Fusion

Today's announcement of NVIDIA integrating SiFive RISC-V cores with NVLink Fusion marks a strategic shift:

• Technical Implementation: RISC-V cores manage data coherency between NVIDIA GPUs and third-party accelerators
• Market Significance: Provides an open alternative to ARM's CXL-based solutions in heterogeneous computing
• Benchmark Impact: Early tests show 15% latency reduction in GPU-to-FPGA communication

This collaboration signals RISC-V's maturation beyond embedded systems into high-performance computing—a domain traditionally dominated by x86 and ARM.

Ecosystem Challenges

Despite progress, hurdles remain:

• Software Fragmentation: Incompatible RISC-V extensions create compatibility headaches
• Performance Validation: Claims of "competitive performance with ARM" still lack independent verification
• Patent Risks: Aggressive patent litigation from legacy ISA holders threatens adoption

Asanović acknowledges: "Standardization isn't sexy, but it's essential. We're prioritizing the RISC-V International compliance suite over proprietary features."

Contextual Implications

The NVIDIA deal emerges amid structural shifts:

• Edge computing demands specialized accelerators where RISC-V excels
• U.S.-China tech decoupling drives Chinese firms toward open ISA alternatives
• Geopolitical pressure on ARM following export restrictions

Future Outlook

SiFive's roadmap targets AI inference workloads with matrix operation extensions, while NVIDIA's adoption validates RISC-V for data center applications. The partnership exemplifies how open standards can coexist with commercial IP strategies—provided fragmentation risks are managed.

Additional Resources:

• RISC-V International Specifications
• SiFive IP Blocks Documentation
• NVLink Fusion White Paper