The Hearts of the Super Nintendo: Understanding Clock Generators in Retro Hardware

When studying vintage computer systems, understanding how components work together at the hardware level reveals fundamental aspects of their design. Every computer has at least one 'heart'—a clock generator that dictates the tempo to all other chips. The Clock (CLK) output pin connects to copper lines that spread throughout the system, feeding into the CLK input pin of various components.

From CPUs like the Motorola 68000 and Intel Pentium to processors in gaming consoles, all have a CLK input pin. This clock signal can be generated by two types of components: crystal oscillators, which appear as flattened capsules, and ceramic resonators, which look less high-tech but tend to drift over time.

Inside the Super Nintendo, we find two of these clock generators. In the X2 slot, a blue ceramic resonator operates at 24.576 MHz and is positioned near the audio chips, setting the pace for the Audio Processing Unit. In the X1 slot, a yellow oscillator labeled D21L3 runs at 21.300 MHz and is located near the CPU and Picture Processing Unit.

Interestingly, discrepancies exist between what we observe on the motherboard and what's documented in the Super Nintendo developer guide. The official documentation shows three oscillators (including one for the CIC chip responsible for copy-protection), yet we only find two physically. Additionally, the CPU/PPU frequency is documented as 21.47727MHz, but we observe a 21.300MHz oscillator on this PAL motherboard.

The explanation lies in a small red component near the oscillator—a variable capacitor (or trimmer capacitor) that adjusts the frequency from 21.500 MHz to 21.47727 MHz. This design choice likely allowed technicians to tune the oscillator if it deteriorated over time, which is fortunate since a common SNES issue is rendering in black and white—often fixable by adjusting this capacitor or replacing the oscillator.

While there are only two 'master' clocks in the console, none of the processors use these frequencies directly. Instead, the master clocks pass through dividers to create new clocks. For example, the Ricoh 5A22 CPU runs at 1/6 of the master clock, resulting in 3.579545MHz. The SNES community has extensively documented these divider relationships.

The NTSC system uses the following timing relationships:

• NTSC crystal: 21.4772700MHz
• NTSC color clock: 3.57954500MHz (21.4772700MHz/6)
• NTSC master clock: 21.4772700MHz
• NTSC dot clock: 5.36931750MHz (21.4772700MHz/4)
• NTSC cpu clock: 3.57954500MHz (21.4772700MHz/6)
• NTSC frame rate: 60.09880627Hz

For the Audio Processing Unit:

• APU oscillator: 24.576MHz
• DSP sample rate: 32000Hz (24.576MHz/24/32)
• SPC700 cpu clock: 1.024MHz (24.576MHz/24)
• SPC700 timer 0+1: 8000Hz (24.576MHz/24/128)
• CIC clock: 3.072MHz (24.576MHz/8)

In total, the Super Nintendo generates fifteen distinct clock signals from its two master oscillators.

The clock signals are also fed into the cartridge port. The SYS-CLK (21.47727MHz) line allows cartridges to embed their own processors, known as enhancement chips. The most famous example is StarFox, which features a 'mario' SuperFX processor that runs at either 10.738635MHz (MARIO version) or 21.47727MHz (GSU-1 version).

Another clock line, CIC-CLK (3.072MHz), feeds into the CIC chip in the cartridge for copy protection purposes. However, SYS-CLK wasn't always suitable for all enhancement chips. For instance, Megaman X2 used a CX4 chip for graphic effects with its own 20 MHz oscillator rather than using the system clock.

This exploration of the SNES clock generators reveals the elegant hardware design that powered one of gaming's most iconic consoles, demonstrating how timing orchestration forms the foundation of computational systems.