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UC Irvine's 140 GHz Transceiver Achieves 120 Gbps, Bypassing the DAC Bottleneck for 6G

Chips Reporter
4 min read

Researchers have demonstrated a silicon-based transceiver operating in the 140 GHz band that transmits data at 120 Gbps (15 GB/s) using only 230 mW, a power efficiency that sidesteps the digital-to-analog converter (DAC) bottleneck limiting current high-speed wireless designs. Fabricated on a mature 22nm FD-SOI process, the design suggests a viable path for mass-produced, high-speed wireless links in data centers and future 6G devices.

A team from the University of California, Irvine has unveiled a wireless transceiver that operates in the 140 GHz frequency band and achieves a data rate of 120 gigabits per second (Gbps), equivalent to 15 gigabytes per second. This performance surpasses the theoretical limits of current commercial wireless standards, including Wi-Fi 7 (30 Gbps) and 5G mmWave (5 Gbps), and approaches the 100 Gbps typical of fiber optic connections used in data centers. The breakthrough, detailed in two papers published in the IEEE Journal of Solid-State Circuits, centers on a novel analog-domain architecture that circumvents the power and complexity limitations of conventional digital transmitters.

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The core innovation addresses a critical engineering challenge known as the "DAC bottleneck." Traditional high-speed wireless transmitters rely on digital-to-analog converters (DACs) to shape digital data into analog radio signals. As data rates climb into the hundreds of gigabits per second, the required DACs become extraordinarily complex and power-hungry. "At such speeds, conventional transmitters that create signals using digital-to-analog converters are incredibly complex and power-hungry, and face what we call a DAC bottleneck," explained lead author Zisong Wang. The UC Irvine team's solution replaces the monolithic DAC with three synchronized sub-transmitters that operate directly in the analog domain. This configuration requires only 230 milliwatts of power to function, a stark contrast to the several watts a comparable DAC-based system would demand. "If we stuck to traditional methods, the battery life of next-generation devices would vanish in minutes," noted Payam Heydari, director of the UC Irvine Nanoscale Communication Integrated Circuits Labs. "Our group’s answer is a transceiver that leapfrogs over current limitations by performing complex calculations in the analog domain, rather than the power-hungry digital domain."

The design's manufacturing feasibility is a key advantage. The transceiver is fabricated using 22nm fully depleted silicon-on-insulator (FD-SOI) technology. This process node is significantly more mature and cost-effective than the cutting-edge 2nm and 18A nodes currently being developed by foundries like TSMC and Samsung. The use of FD-SOI provides excellent RF performance and power efficiency, making the design suitable for integration into silicon without requiring exotic materials or extreme ultraviolet (EUV) lithography. This manufacturing accessibility could accelerate adoption in consumer devices and infrastructure, as it aligns with existing high-volume semiconductor production lines.

The implications for data center architecture are substantial. The researchers position their technology as a viable wireless alternative to the dense cabling required to connect servers, switches, and storage arrays. By enabling short-range, multi-hundred-gigabit wireless links, data centers could reduce physical complexity, lower cooling costs, and gain flexibility in hardware layout. The 120 Gbps rate is directly competitive with the 100 Gbps and 400 Gbps optical links that dominate modern data center backbones, suggesting a potential shift toward hybrid wired-wireless interconnects.

However, the technology faces inherent physical constraints. The 140 GHz band, while offering immense bandwidth, suffers from high atmospheric attenuation and limited range. Current 5G mmWave systems operating at up to 71 GHz already struggle with range, typically achieving only about 300 meters under ideal conditions. The higher frequency of the UC Irvine transceiver will likely result in even shorter propagation distances, potentially measured in tens of meters. This limitation points toward a future deployment model reliant on dense networks of small cells, particularly in urban environments or within controlled facilities like data centers. "Unless we see new innovations that could extend the reach of this high-speed wireless technology, we may see a future where our cities are dotted with high-speed cell sites," the article notes.

The work aligns with the trajectory of 6G research, which is actively exploring the sub-terahertz spectrum (100-300 GHz) for next-generation wireless networks. The Federal Communications Commission (FCC) and international standards bodies are already considering allocations in this range. The UC Irvine transceiver provides a concrete hardware demonstration of what is achievable at these frequencies, focusing on power efficiency and integration—a critical combination for mobile and infrastructure applications. The research papers, "A 140 GHz 120 Gbps Bits-to-Antenna Transmitter in 22nm FD-SOI" and "A 140 GHz 120 Gbps Antenna-to-Bits Receiver in 22nm FD-SOI," provide the detailed circuit-level analysis for the community.

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In summary, the UC Irvine transceiver represents a significant step in high-frequency wireless engineering. By shifting complex signal processing to the analog domain and leveraging a mature semiconductor process, the design achieves unprecedented data rates with minimal power consumption. While range limitations will necessitate dense infrastructure, the technology offers a compelling blueprint for ultra-high-speed wireless links in data centers and a potential cornerstone for future 6G devices. The path forward involves scaling the design, addressing packaging and antenna integration challenges, and demonstrating real-world system-level performance beyond the lab bench.

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