Overview
Cache misses are a major source of performance degradation. When a miss occurs, the CPU must stall or perform other work while the data is retrieved from the much slower RAM (or even disk).
Types of Misses (The 3 Cs)
- Compulsory: The first time a piece of data is accessed (unavoidable).
- Capacity: The cache is too small to hold all the data the program needs.
- Conflict: Multiple memory locations map to the same cache line (in set-associative caches).
Impact
A cache miss can take hundreds of clock cycles, whereas a cache hit takes only a few.