Intel Xeon 6+ 'Clearwater Forest' Enters Data Center Market with 288-Core Design on 18A Process

Intel is making a strong comeback in the data center processor market with the introduction of Xeon 6+ 'Clearwater Forest' processors, leveraging the company's most advanced 18A manufacturing process. This new architecture represents a significant evolution from Intel's previous-generation Sierra Forest chips, with substantial increases in core counts, cache sizes, and performance claims that directly challenge competitors like AMD and emerging ARM-based solutions.

The flagship Xeon 6990E+ is designed for maximum compute density, packing in 288 Darkmont E-cores without Hyper-Threading support. This core count more than doubles previous-generation offerings and significantly exceeds AMD's current Epyc 9965 with its 192 cores. The processor also features an impressive 576 MB of L3 cache, more than five times the amount found in Intel's previous-generation flagship. For maximum scalability, the Xeon 6+ architecture supports dual-socket configurations, effectively doubling the core count to 576 cores in a single system.

Architectural Innovation and Manufacturing Process

Xeon 6+ represents the culmination of Intel's disaggregated processor design approach, utilizing a sophisticated mixture of process nodes and packaging techniques to achieve unprecedented core density. The architecture consists of multiple components:

• 12 CPU chiplets built on Intel's advanced 18A process, each containing 24 Darkmont E-cores
• 3 base tiles constructed using Intel 3 process technology, housing the L3 cache and memory controllers
• 2 I/O chiplets manufactured on Intel 7 process, handling peripheral connectivity
• 12 EMIB 2.5D tiles acting as silicon bridges that directly connect the chiplets within the substrate

This heterogeneous approach allows Intel to optimize each component for its specific function while maintaining high manufacturing yields. The use of Intel's cutting-edge 18A process for the compute chiplets is particularly significant, as this represents the company's most advanced manufacturing technology to date.

Platform and Connectivity Specifications

Xeon 6+ processors maintain compatibility with existing Xeon 6 platforms, using the LGA 4710 socket (the same as Sierra Forest). This design choice ensures backward compatibility for system manufacturers and data center operators. The platform offers substantial connectivity options:

• Memory: Support for 12 channels of DDR5 memory, operating at speeds up to 8000MT/s
• I/O: 96 lanes of PCIe 5.0 connectivity, with 64 lanes dedicated to CXL 2.0 for expansion and interoperability
• Interconnect: 6 UPI 2.0 lanes for multi-processor communication

These specifications position Xeon 6+ as a high-bandwidth, high-connectivity solution suitable for demanding data center workloads including virtualization, high-performance computing, and artificial intelligence inference.

Hardware Accelerators and Security Features

Intel has equipped the Xeon 6+ processors with a comprehensive set of hardware accelerators to optimize performance for specific workloads:

• Intel QAT (QuickAssist Technology): Cryptographic acceleration
• DLB (Dynamic Load Balancer): Optimizes workload distribution
• DSA (Data Streaming Accelerator): Enhances data movement efficiency
• IAA (In-memory Analytics Accelerator): Speeds up data processing

The flagship 6990E+ includes 16 total accelerators, with four of each type. Intel has also expanded cryptographic capabilities with new instruction set support for SHA-512, SM3, and SM4 algorithms. For security, the processors offer enhanced confidential computing through Intel SGX for application isolation and Intel TDX for VM isolation, with support for up to 1024 Intel TDX keys per CPU.

Power Efficiency and Thermal Design

The Xeon 6+ family introduces a significant shift in thermal design power (TDP) compared to previous generations. While Sierra Forest topped out at 330W, the new Xeon 6+ range starts at 300W and goes up to 450W for the flagship model. This higher TDP ceiling allows for greater performance headroom but also brings Intel's high-end offerings more in line with AMD's EPYC thermal profiles.

Notably, Intel is offering power-limited configurations for its top two models (6990E+ and 6980E+), with reduced base and all-core turbo speeds but identical core counts and cache sizes. This flexibility allows data center operators to select the optimal power-performance balance for their specific workloads and cooling infrastructure.

New Monitoring Capabilities with Intel AET

A standout feature of Xeon 6+ processors is Intel Application Energy Telemetry (AET), a hardware-based monitoring tool that provides unprecedented insight into energy consumption at granular levels. According to Intel, AET can track energy usage for "workloads, microservices, containers, VMs, applications and even on an individual software thread-level when desired." This capability represents a significant advancement in data center energy management, allowing operators to identify and optimize power-hungry components and workloads with precision.

Performance Claims and Competitive Positioning

Intel has presented extensive benchmark data supporting the performance claims for Xeon 6+. Compared to the previous-generation Xeon 6780E, Intel claims an average 2.26x performance improvement across a range of workloads. This substantial uplift is expected given the 288-core design versus the 6780E's 144 cores and the architectural improvements.

More significantly, Intel asserts that the Xeon 6990E+ delivers 30% higher performance per thread compared to AMD's 192-core Epyc 9965, along with 30% better performance per thread per watt. These claims suggest that Intel has regained competitiveness in the data center market after several generations of falling behind AMD's EPYC offerings.

Intel also reports a 55% average efficiency improvement over the previous generation, with specific improvements ranging from 30% in Stream Triad memory bandwidth to 79% in Linpack benchmarks. At 40% CPU utilization, Intel claims the 6990E+ is up to 30% more efficient than the Epyc 9965, though the efficiency advantage narrows as utilization increases.

Instruction Set Limitations

Despite the architectural advancements, Xeon 6+ processors have notable limitations in their instruction set support. Intel has confirmed that these processors do not support any form of AVX10 or AVX-512, topping out at AVX2. This represents a significant reduction in vector processing capabilities compared to Intel's previous-generation data center processors and AMD's current EPYC offerings, which include AVX-512 support. For workloads that heavily leverage advanced vector instructions, this limitation could offset some of the per-thread performance advantages claimed by Intel.

Market Implications and Competitive Landscape

The introduction of Xeon 6+ processors signals Intel's renewed commitment to the data center market, which has seen significant market share erosion to AMD's EPYC lineup over the past several years. The combination of high core counts, advanced packaging, and competitive performance claims positions Intel to regain ground in this lucrative segment.

The processors also represent Intel's first major products built on its 18A process, a critical node in the company's manufacturing roadmap. Successful deployment of these chips will validate Intel's process technology claims and could influence the company's future competitiveness against TSMC and Samsung.

While Intel claims competitive performance against ARM-based options, the company has not provided direct benchmarks against ARM processors like Nvidia's upcoming Vera CPU. As ARM gains traction in the data center, direct comparisons will become increasingly important for evaluating Intel's competitive position.

Product Lineup and Availability

Intel has announced four Xeon 6+ designs with six total SKUs, ranging from the 288-core 6990E+ down to the 144-core 6960E+. The complete lineup includes:

• Xeon 6990E+: 288 cores, 576 MB L3 cache, 450W TDP
• Xeon 6980E+: 288 cores, 576 MB L3 cache, 330W TDP
• Xeon 6970E+: 192 cores, 480 MB L3 cache, 400W TDP
• Xeon 6960E+: 144 cores, 432 MB L3 cache, 330W TDP

The staggered TDP options within each core count provide flexibility for different power budgets and thermal envelopes, allowing system builders to optimize for either maximum performance or power efficiency depending on their requirements.

As Intel begins shipping these processors, the data center market will have a clear choice between Intel's high-core-count E-core approach, AMD's balanced P-core/E-core designs, and emerging ARM-based alternatives. The competitive dynamics in this space will likely influence server pricing, innovation roadmaps, and ultimately the cost and performance of cloud computing services for years to come.